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Datasheet: I5216EI (Winbond)

8 TO 16 MINUTE VOICE RECORD/PLAYBACK SYSTEM WITH INTEGRATED CODEC

 

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Winbond
I5216 SERIES
Advanced Information
PRELIMINARY
8 TO 16 MINUTE VOICE RECORD/PLAYBACK SYSTEM WITH
INTEGRATED CODEC
Publication Release Date: November 30, 2001
-1
Revision A1
GENERAL DESCRIPTION
The ChipCorder I5216 is an 8 to 16 minute Voice and Data Record and Playback system with
integrated Voice band CODEC. The device works on a single 2.7V to 3.3V supply, and has fully
integrated system functions, including: AGC, microphone preamplifier, speaker driver, memory and
CODEC. The CODEC meets the PCM conformance specification of the G.714 recommendation. Its -
Law and A-law compander meets the specification of the ITU-T G.711 recommendation.
FEATURES
Single Supply 2.7 to 3.3 Volt operation
Voice and digital data record and playback system on a single chip
Industry-leading sound quality
Low voltage operation
Message management
Fully integrated system functions
Flexible architecture
Nonvolatile message storage
Configurable ChipCorder sampling rates of 4 kHz, 5.3kHz, 6.4 kHz and 8kHz
8, 10, 12 and 16 minutes duration
External or internal Voice recorder clock
I
2
C serial interface (400kHz)
Configurable analog paths
2.2V Microphone Bias Pin
100 year message retention (typical)
100K analog record cycles (typical)
10K digital record cycles (typical)
Full-duplex (not in I
2
S mode) single channel speech CODEC with :
o
External 13.824 MHz, 27.648 MHz, 20.48 MHz or 40.96 MHz master clock
o
I
2
S and PCM digital audio interface ports
o
Serial transfer data rate from 64 to 3072 Kbps
o
Short and Long frame sync formats
o
2s complement and signed magnitude data format
o
Complete -Law and A-Law companding
o
Linear 14 bit
PCM CODEC-filter for A/D and D/A converter
o
8 kHz or 44.1 kHz 48 kHz digital audio sampling rate options
o
Analog receive and transmit gain adjust
o
Configurable setup through the I
2
C interface
I5216 SERIES
Advanced Information
PRELIMINARY
Publication Release Date: November 30, 2001
-2
Revision A1
TABLE OF CONTENTS
GENERAL DESCRIPTION
.......................................................................................................1
FEATURES
.............................................................................................................................. 1
PIN LAYOUT & DESCRIPTIONS
............................................................................................ 4
I5216 BLOCK DIAGRAMS
....................................................................................................... 6
FUNCTIONAL DESCRIPTION
................................................................................................ 8
SPEECH/SOUND QUALITY
....................................................................................... 8
DURATION
................................................................................................................. 8
FLASH STORAGE
...................................................................................................... 9
MICROCONTROLLER INTERFACE
.......................................................................... 9
PROGRAMMING
........................................................................................................ 9
APPLICATIONS
....................................................................................................................... 9
INTERNAL REGISTERS
....................................................................................................... 14
MEMORY ORGANIZATION
.................................................................................................. 17
OPERATION MODES
............................................................................................................ 17
I
2
C PORT
............................................................................................................................... 17
I
2
C SLAVE ADDRESS
........................................................................................................... 18
I
2
C OPERATION DEFINITIONS
............................................................................................ 19
I
2
C CONTROL REGISTERS
.................................................................................................. 21
COMMAND BYTE
.................................................................................................................. 21
FUNCTION BITS
................................................................................................................... 21
REGISTER BITS
.................................................................................................................... 22
OPCODE SUMMARY
............................................................................................................ 22
DATABYTES
.......................................................................................................................... 24
POWER-UP SEQUENCE
..................................................................................................... 25
SET MASTER CLOCK DIVISION RATIO
............................................................................. 25
PLAYBACK MODE
..................................................................................... ......................... 26
RECORD MODE
...................................................................................................... ............ 26
FEED THROUGH MODE
........................................................................................ ............ 26
CALL RECORD
....................................................................................................... ............ 30
MEMO RECORD
..................................................................................................... ............ 31
MEMO & CALL PLAYBACK
..................................................................................... ............ 32
MESSAGE CUEING
................................................................................................ ............ 34
ANALOG MODE
...................................................................................................... ............ 34
I5216 SERIES
Advanced Information
PRELIMINARY
Publication Release Date: November 30, 2001
-3
Revision A1
AUTO MUTE & AUTO GAIN FUNCTIONS
............................................................. ............ 37
VOLUME CONTROL DESCRIPTION
..................................................................... ............ 38
SPEAKER & AUX OUT DESCRIPTION
.................................................................. ............ 39
MICROPHONE INPUTS
.......................................................................................... ............ 40
DIGITAL MODE
....................................................................................................... ............ 41
WRITING DATA
.................................................................................................................... 41
READING DATA
................................................................................................................... 41
ERASING DATA
................................................................................................................... 41
EXAMPLE COMMAND SEQUENCES
................................................................................. 42
PIN DETAILS
........................................................................................................................ 45
DIGITAL I/O PINS
.................................................................................................... 45
ANALOG I/O PINS
................................................................................................... 48
AUXILIARY OUTPUT
.............................................................................................. 49
AUXILIARY INPUT
.................................................................................................. 50
POWER & GROUND PINS
..................................................................................... 51
SAMPLE LAYOUT FOR PDIP
................................................................................. 52
ELECTRICAL CHARACTERISTICS
..................................................................................... 53
ABSOLUTE MAXIMUM RATINGS FOR PACKAGED PARTS
................................ 53
ABSOLUTE MAXIMUM RATINGS FOR DIE
........................................................... 53
OPERATING CONDITIONS FOR PACKAGED PARTS
......................................... 53
OPERATING CONDITIONS FOR DIE
.................................................................... 54
GENERAL PARAMETERS
................................................................................................... 54
TIMING PARAMETERS
........................................................................................................ 55
ANALOG PARAMETERS
..................................................................................................... 57
I
2
C INTERFACE TIMING
...................................................................................................... 60
CODEC PARAMETERS
....................................................................................................... 61
TIMING DIAGRAMS
............................................................................................................. 62
I
2
C SERIAL INTERFACE TECHNICAL INFORMATION
...................................................... 69
I
2
S SERIAL INTERFACE TECHNICAL INFORMATION
...................................................... 73
DEVICE PHYSICAL DIMENSIONS
...................................................................................... 77
DIE BONDING PHYSICAL LAYOUT
.................................................................................... 80
ORDERING INFORMATION
................................................................................... 82
I5216 SERIES
Advanced Information
PRELIMINARY
Publication Release Date: November 30, 2001
-4
Revision A1
SOIC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
I5216
V
CCD
SCL
A1
SDA
V
SSD
V
SSD
A0
MICBS
MIC-
MIC+
V
SSA
ACAP
SP-
V
SSA
SP+
V
CCA
AUX IN
WS
SCK
AUX OUT
NC
SDI
V
SSA
SDIO
RAC
INT
MCLK
V
CCD

ISD5216
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
SSD
V
SSD
A0
SDA
A1
SCL
V
CCD
V
CCD
MCLK
INT
RAC
SDI
SDIO
V
SSA
V
SSA
MICBS
MIC+
MIC-
ACAP
SP-
AUX IN
SCK
AUX OUT
WS
V
CCA
SP+
V
SSA
NC
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
SSD
V
SSD
A0
SDA
A1
SCL
V
CCD
V
CCD
MCLK
INT
RAC
SDI
SDIO
V
SSA
MICBS
MIC+
MIC-
ACAP
SP-
AUX IN
SCK
AUX OUT
WS
V
CCA
SP+
V
SSA
NC
ISD5216
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 -PIN TSOP
PDIP/SOIC
V
SSA
I5216
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
SSD
V
SSD
A0
SDA
A1
SCL
V
CCD
V
CCD
MCLK
INT
RAC
SDI
SDIO
V
SSA
V
SSA
MICBS
MIC+
MIC-
ACAP
SP-
AUX IN
SCK
AUX OUT
WS
V
CCA
SP+
V
SSA
NC
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
SSD
V
SSD
A0
SDA
A1
SCL
V
CCD
V
CCD
MCLK
INT
RAC
SDI
SDIO
V
SSA
MICBS
MIC+
MIC-
ACAP
SP-
AUX IN
SCK
AUX OUT
WS
V
CCA
SP+
V
SSA
NC
I5216
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 -PIN TSOP
V
SSA
ISD5216 Pin Layout
PDIP
I5216 SERIES
Advanced Information
PRELIMINARY
Publication Release Date: November 30, 2001
-5
Revision A1
PIN DESCRIPTION
Pin Name
Pin No.
28-pin
TSOP
Pin No.
28-pin
PDIP
Pin No.
28-pin
SOIC
Functionality
RAC
4
25
25
Row Address Clock; an open drain output. The RAC pin goes LOW
T
RACLO
1
before the end of each row of memory, and returns HIGH
at exactly the end of each row of memory.
/INT
5
26
26
Interrupt Output; an open drain output indicating that a set EOM bit
has been found during Playback, or that the chip is in an Overflow
(OVF) condition. This pin remains LOW until a Read Status
command is executed.
MCLK
6
27
27
This pin allows the internal clock of the Voice record/playback
system to be externally driven for enhanced timing precision. This
pin is grounded for most applications. It is required for the CODEC
operation.
SCL
9
2
2
Serial Clock Line is part of the I
2
C serial bus. It is used to clock the
data into and out of the I
2
C interface.
SDA
11
4
4
Serial Data Line is part of the I
2
C serial bus. Data is passed
between devices on the bus over this line.
A0
12
5
7
Input pin that supplies the LSB for the I
2
C Slave Address.
A1
10
3
3
Input pin that supplies the LSB +1 bit for the I
2
C Slave Address.
MIC+
16
9
10
Differential positive Input to the microphone amplifier.
MIC-
17
10
9
Differential negative Input to the microphone amplifier.
MICBS
18
11
8
Microphone Bias Voltage
ACAP
19
12
12
AGC Capacitor connection. Required for the on-chip AGC amplifier.
SP+
22
15
15
Differential Positive Speaker Driver Output.
SP-
20
13
13
Differential Negative Speaker Driver Output. When the speaker
outputs are in use, the AUX OUT output is disabled.
AUX IN
24
17
17
Auxiliary Input. This is one of the gain adjustable analog inputs for
the device.
AUX OUT
25
18
20
Auxiliary Output. This is one the analog outputs for the device.
When this output is in use, the SP+ and SP- outputs are disabled.
SDI
2
23
22
Serial Digital Audio PCM Input.
SDIO
3
24
24
Serial Digital Audio PCM Output or I
2
S Input/Output.
WS
28
21
18
Digital audio PCM Frame sync (FS) or I
2
S Word Sync (WS).
SCK
27
20
19
Digital audio PCM or I
2
S Serial Clock.
V
CCD
7,8
1,28
1,28
Positive Digital Supply pins. These pins carry noise generated by
internal clocks in the chip. They must be carefully bypassed to
Digital Ground to ensure correct device operation.
V
SSD
13,14
6,7
5,6
Digital Ground pins.
V
SSA
1,15,21
8,14,22 11,14,23 Analog Ground pins.
V
CCA
23
16
16
Positive Analog Supply pin. This pin supplies the low level audio
sections for the device. It should be carefully bypassed to Analog
Ground to ensure correct device operation.
NC 26
19 21
No
Connection
1
See parameters section of the datasheet.
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