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Datasheet: 100321F (National Semiconductor)

Low Power 9-Bit Inverter

 

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National Semiconductor
100321
Low Power 9-Bit Inverter
General Description
The 100321 is a monolithic 9-bit inverter. The device con-
tains nine inverting buffer gates with single input and output.
All inputs have 50 k
pull-down resistors.
Features
n
30% power reduction of the 100121
n
2000V ESD protection
n
Pin/function compatible with 100121
n
Voltage compensated operating range = -4.2V to -5.7V
n
Available to MIL-STD-883
Logic Symbol
Pin Names
Description
D
1
D
9
Data Inputs
O
1
O
9
Data Outputs
Connection Diagrams
DS100309-1
24-Pin DIP
DS100309-2
24-Pin Quad Cerpak
DS100309-3
August 1998
100321
Low
Power
9-Bit
Inverter
1998 National Semiconductor Corporation
DS100309
www.national.com
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Above which the useful life may be impaired
Storage Temperature (T
STG
)
-65C to +150C
Maximum Junction Temperature (T
J
)
Ceramic
+175C
Plastic
+150C
V
EE
Pin Potential to Ground Pin
-7.0V to +0.5V
Input Voltage (DC)
V
EE
to +0.5V
Output Current (DC Output HIGH)
-50 mA
ESD (Note 2)
2000V
Recommended Operating
Conditions
Case Temperature (T
C
)
Military
-55C to +125C
Supply Voltage (V
EE
)
-5.7V to -4.2V
Note 1: Absolute maximum ratings are those values beyond which the de-
vice may be damaged or have its useful life impaired. Functonal operation
under these conditions is not implied.
Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
Military Version
DC Electrical Characteristics
V
EE
= -4.2V to -5.7V, V
CC
= V
CCA
= GND, T
C
= -55C to +125C
Symbol
Parameter
Min
Max
Units
T
C
Conditions
Notes
V
OH
Output HIGH Voltage
-1025
-870
mV
OC to
+125C
-1085
-870
mV
-55C
V
IN
= V
IH
(Max)
Loading with
(Notes 3, 4, 5)
V
OL
Output LOW Voltage
-1830
-1620
mV
0C to
or V
IL
(Min)
50
to -2.0V
+125C
-1830
-1555
mV
-55C
V
OHC
Output HIGH Voltage
-1035
mV
0C to
+125C
-1085
mV
-55C
V
IN
= V
IH
(Min)
Loading with
(Notes 3, 4, 5)
V
OLC
Output LOW Voltage
-1610
mV
0C to
or V
IL
(Max)
50
to -2.0V
+125C
-1555
mV
-55C
V
IH
Input HIGH Voltage
-1165
-870
mV
-55C to
Guaranteed HIGH Signal
(Notes 3, 4, 5,
6)
+125C
for All Inputs
V
IL
Input LOW Voltage
-1830
-1475
mV
-55C to
Guaranteed LOW Signal
(Notes 3, 4, 5,
6)
+125C
for All Inputs
I
IL
Input LOW Current
0.50
A
-55C to
V
EE
= -4.2V
(Notes 3, 4, 5)
+125C
V
IN
= V
IL
(Min)
I
IH
Input HIGH Current
240
A
0C to
+125C
V
EE
= -5.7V
(Notes 3, 4, 5)
340
A
-55C
V
IN
= V
IH
(Max)
I
EE
Power Supply
Current
-70
-25
mA
-55C to
Inputs Open
(Notes 3, 4, 5)
+125C
Note 3: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals -55C), then testing immediately
without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides "cold start" specs which can be considered a worst case
condition at cold temperatures.
Note 4: Screen tested 100% on each device at -55C, +25C, and +125C, Subgroups 1, 2, 3, 7, and 8.
Note 5: Sample tested (Method 5005, Table I) on each manufactured lot at -55C, +25C and +125C, Subgroups A1, 2, 3, 7, and 8.
Note 6: Guaranteed by applying specified input condition and testing V
OH
/V
OL
.
www.national.com
2
AC Electrical Characteristics
V
EE
= -4.2V to -5.7V, V
CC
= V
CCA
= GND
Symbol
Parameter
T
C
= -55C
T
C
= +25C
T
C
= +125C
Units
Conditions
Notes
Min
Max
Min
Max
Min
Max
t
PLH
Propagation Delay
0.30
1.80
0.40
1.60
0.40
1.80
ns
(Notes 7, 8, 9,
11)
t
PHL
Data to Output
Figures 1, 2
t
TLH
Transition Time
0.30
1.20
0.30
1.20
0.30
1.20
ns
(Note 10)
t
THL
20% to 80%, 80% to
20%
Note 7: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals -55C), then testing immediately
after power-up. This provides "cold start" specs which can be considered a worst case condition at cold temperatures.
Note 8: Screen tested 100% on each device at +25C temperature only, Subgroup A9.
Note 9: Sample tested (Method 5005, Table I) on each mfg. lot at +25C, Subgroup A9, and at +125C and -55C temperatures, Subgroups A10 and A11.
Note 10: Not tested at +25C, +125C, and -55C temperature (design characterization data).
Note 11: The propagation delay specified is for single output switching. Delays may vary up to 200 ps with multiple outputs switching.
Test Circuitry
Switching Waveforms
DS100309-5
Notes:
V
CC
, V
CCA
= +2V, V
EE
= -2.5V
L1 and L2 = equal length 50
impedance lines
R
T
= 50
terminator internal to scope
Decoupling 0.1 F from GND to V
CC
and V
EE
All unused outputs are loaded with 50
to GND
C
L
= Fixture and stray capacitance
3 pF
FIGURE 1. AC Test Circuit
DS100309-6
FIGURE 2. Propagation Delay and Transition Times
www.national.com
3
4
Physical Dimensions
inches (millimeters) unless otherwise noted
24-Lead Ceramic Dual-In-Line Package (D)
NS Package Number J24E
24-Lead Quad Cerpak (F)
NS Package Number W24B
www.national.com
5
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