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Datasheet: M14911EJ7V0DS00 (NEC)

 

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2001
MOS INTEGRATED CIRCUIT



PD29F032202AL-X
32M-BIT CMOS LOW-VOLTAGE DUAL OPERATION FLASH MEMORY
4M-WORD BY 8-BIT (BYTE MODE) / 2M-WORD BY 16-BIT (WORD MODE)
DATA SHEET
Document No. M14911EJ7V0DS00 (7th edition)
Date Published September 2002 NS CP (K)
Printed in Japan
The mark
5
5
5
5
shows major revised points.
Description
The
PD29F032202AL-X is a flash memory organized of 33,554,432 bits and 71 sectors. Sectors of this memory
can be erased at a low voltage (2.7 to 3.3 V, 3.0 to 3.6 V) supplied from a single power source, or the contents of the
entire chip can be erased. Two modes of memory organization, BYTE mode (4,194,304 words
8 bits) and WORD
mode (2,097,152 words
16 bits), are selectable so that the memory can be programmed in byte or word units.
The
PD29F032202AL-X can be read while its contents are being erased or programmed. The memory cell is
divided into two banks. While sectors in one bank are being erased or programmed, data can be read from the other
bank thanks to the simultaneous execution architecture. The banks are 4M bits and 28M bits.
This flash memory comes in two types. The T type has a boot sector located at the highest address (sector) and the
B type has a boot sector at the lowest address (sector).
Because the
PD29F032202AL-X enables the boot sector to be erased, it is ideal for storing a boot program. In
addition, program code that controls the flash memory can be also stored, and the program code can be
programmed or erased without the need to load it into RAM. Eight small sectors for storing parameters are provided,
each of which can be erased in 8K bytes units.
Once a program or erase command sequence has been executed, an automatic program or automatic erase
function internally executes program or erase and verification automatically.
Because the
PD29F032202AL-X can be electrically erased or programmed by writing an instruction, data can be
reprogrammed on-board after the flash memory has been installed in a system, making it suitable for a wide range of
applications.
This flash memory is packed in a 48-pin PLASTIC TSOP (I) and 63-pin TAPE FBGA.
Features
Two bank organization enabling simultaneous execution of program / erase and read
Bank organization: 2 banks (4M bits + 28M bits)
Memory organization : 4,194,304 words
8 bits (BYTE mode)
2,097,152 words
16 bits (WORD mode)
Sector organization : 71 sectors (8K bytes / 4K words
8 sectors, 64K bytes / 32K words
63 sectors)
2 types of sector organization
T type : Boot sector allocated to the highest address (sector)
B type : Boot sector allocated to the lowest address (sector)
3-state output
Automatic program
Program suspend / resume
Data Sheet M14911EJ7V0DS
2



PD29F032202AL-X
Unlock bypass program
Automatic erase
Chip erase
Sector erase (sectors can be combined freely)
Erase suspend / resume
Program / Erase completion detection
Detection through data polling and toggle bits
Detection through RY (/BY) pin
Sector group protection
Any sector group can be protected
Any protected sector group can be temporary unprotected
Sectors can be used for boot application
Hardware reset and standby using /RESET pin
Automatic sleep mode
Boot block sector protect by /WP (ACC) pin
Conforms to common flash memory interface (CFI)
Extra One Time Protect Sector provided
PD29F032202AL
Access time
ns (MAX.)
Operating supply
voltage
V
Power supply current
(Active mode)
mA (MAX.)
Standby current
A (MAX.)
Read
Program / Erase
-A85TX, -A85BX
85
3.0 to 3.6
16
30
5
-B85TX, -B85BX
2.7 to 3.3
Operating ambient temperature: 25 to +85
C
Program / erase time
Program : 9.0
s / byte (TYP.)
11.0
s / word (TYP.)
Sector erase :
Program / erase cycle : 100,000 cycles
0.3 s (TYP.) (4K words sector), 0.5 s (TYP.) (32K words sector)
Program / erase cycle : 300,000 cycles
0.5 s (TYP.) (4K words sector), 0.7 s (TYP.) (32K words sector)
Program / erase cycle : 300,000 cycles (MIN.)
Data Sheet M14911EJ7V0DS
3



PD29F032202AL-X
Ordering Information
Part number
Access time
Operating
Boot sector
Package
ns (MAX.)
supply voltage
V
PD29F032202ALGZ-A85TX-MJH
85
3.0 to 3.6
Top address (sector)
48-pin PLASTIC TSOP (I) (12
20)
(T type)
(Normal bent)
PD29F032202ALGZ-A85BX-MJH
Bottom address (sector)
(B type)
PD29F032202ALF9-A85TX-BS2
Top address (sector)
63-pin TAPE FBGA (11
7)
(T type)
PD29F032202ALF9-A85BX-BS2
Bottom address (sector)
(B type)
PD29F032202ALGZ-B85TX-MJH
2.7 to 3.3
Top address (sector)
48-pin PLASTIC TSOP (I) (12
20)
(T type)
(Normal bent)
PD29F032202ALGZ-B85BX-MJH
Bottom address (sector)
(B type)
PD29F032202ALF9-B85TX-BS2
Top address (sector)
63-pin TAPE FBGA (11
7)
(T type)
PD29F032202ALF9-B85BX-BS2
Bottom address (sector)
(B type)
Remark For address organization of sectors, see section Sector Organization / Sector Address Table.
Data Sheet M14911EJ7V0DS
4



PD29F032202AL-X
Pin Configurations
/xxx indicates active low signal.
48-pin PLASTIC TSOP (I) (12



20) (Normal bent)
[



PD29F032202ALGZ-A85TX-MJH ]
[



PD29F032202ALGZ-A85BX-MJH ]
[



PD29F032202ALGZ-B85TX-MJH ]
[



PD29F032202ALGZ-B85BX-MJH ]
Marking Side
A15
A14
A13
A12
A11
A10
A9
A8
A19
A20
/WE
/RESET
NC
/WP (ACC)
RY (/BY)
A18
A17
A7
A6
A5
A4
A3
A2
A1
A16
/BYTE
GND
I/O15, A
-
1
I/O7
I/O14
I/O6
I/O13
I/O5
I/O12
I/O4
V
CC
I/O11
I/O3
I/O10
I/O2
I/O9
I/O1
I/O8
I/O0
/OE
GND
/CE
A0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A0 to A20
: Address inputs
I/O0 to I/O14 : Data Inputs / Outputs
I/O15, A
-
1
: Data 15 Input / output (WORD mode)
LSB address input (BYTE mode)
/CE
: Chip Enable
/WE
: Write Enable
/OE
: Output Enable
/BYTE
: Mode select
/RESET
: Hardware reset input
RY (/BY)
: Ready (Busy) output
/WP (ACC)
: Write Protect (Accelerated) input
V
CC
: Supply Voltage
GND
: Ground
NC
Note
: No Connection
Note Some signals can be applied because this pin is not connected to the inside of the chip.
Remark Refer to Package Drawings for the 1-pin index mark.
Data Sheet M14911EJ7V0DS
5



PD29F032202AL-X
63-pin TAPE FBGA (11



7)
[



PD29F032202ALF9-A85TX-BS2]
[



PD29F032202ALF9-A85BX-BS2]
[



PD29F032202ALF9-B85TX-BS2]
[



PD29F032202ALF9-B85BX-BS2]
Top View
H
G
F
E
D
C
Top View
Bottom View
B
A
A
B
C
D
E
F
G
H
A
B
C
D
E
F
V
SS
I/O9
I/O5
A7
/OE
I/O7
I/O4
I/O0
A6
A18
A11
A8
A5
I/O8
I/O12
A13
A17
SA
/CEf
I/O10
V
CC
f
/WE
V
CC
s
A16
I/O11
8
7
6
5
4
3
G
H
RY(/BY)
/RESET
A12
I/O6
I/O13
A9
A15
A19
I/O14
/CE1s
I/O15, A-1
I/O1
A1
A2
A4
A10
CIOs
I/O2
A0
A3
2
1
CE2s
A20
A14
/LB
CIOf
/WP(ACC)
/UB
I/O3
NC
NC
V
SS
Top View
Bottom View
H
G
F
E
D
C
B
A
H G F E D C B A
Top View
A0
I/O8
I/O6
A3
/CE
I/O15,A
-
1
I/O12
/OE
A4
A6
A13
A9
A2
GND
I/O13
A14
A5
A16
I/O9
I/O11
/WE
V
CC
I/O3
A18
/WP(ACC)
A12
I/O7
I/O14
A10
A8
GND
/BYTE
I/O0
A1
A11
I/O4
I/O1
/RESET
NC
A15
A7
RY(/BY)
A17
I/O10
A
B
C
D
E
F
G
H
NC
NC
NC
NC
NC
NC
NC
NC
M
K
L
J
M
K L
J
M
K
L
J
8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1
NC
NC
NC
NC
NC
NC
NC
I/O5
I/O2
A20
A19
A0 to A20
: Address inputs
I/O0 to I/O14 : Data Inputs / Outputs
I/O15, A
-
1
: Data 15 Input / output (WORD mode)
LSB address input (BYTE mode)
/CE
: Chip Enable
/WE
: Write Enable
/OE
: Output Enable
/BYTE
: Mode select
/RESET
: Hardware reset input
RY (/BY)
: Ready (Busy) output
/WP (ACC)
: Write Protect (Accelerated) input
V
CC
: Supply Voltage
GND
: Ground
NC
Note
: No Connection
Note Some signals can be applied because this pin is not connected to the inside of the chip.
Remark Refer to Package Drawings for the index mark.
INPUT / OUTPUT PIN FUNCTION
Refer to DUAL OPERATION FLASH MEMORY 32M BITS A SERIES Information (M14914E).
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