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Datasheet: M10693EJ7V0DS00 (NEC)

 

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1992
MOS INTEGRATED CIRCUIT



PD43257B
256K-BIT CMOS STATIC RAM
32K-WORD BY 8-BIT
DATA SHEET
Document No. M10693EJ7V0DS00 (7th edition)
Date Published June 2000 NS CP (K)
Printed in Japan
The mark
5
shows major revised points.
Description
The
PD43257B is a high speed, low power, and 262,144 bits (32,768 words by 8 bits) CMOS static RAM.
Battery backup is available. And the
PD43257B has two chip enable pins (/CE1, CE2) to extend the capacity.
The
PD43257B is packed in 28-pin plastic DIP and 28-pin plastic SOP.
Features
32,768 words by 8 bits organization
Fast access time: 70, 85 ns (MAX.)
Low V
CC
data retention: 2.0 V (MIN.)
Two Chip Enable inputs: /CE1, CE2
Part number
Access time
Operating supply
Operating ambient
Supply current
ns (MAX.)
voltage
temperature
At operating
At standby
At data retention
V
C
mA (MAX.)
A (MAX.)
A (MAX.)
Note
PD43257B-xxL
70, 85
4.5 to 5.5
0 to 70
45
50
3
PD43257B-xxLL
45
15
2
Note
T
A
40
C, V
CC
= 3.0 V
Version X
This Data sheet can be applied to the version X. This version is identified with its lot number. Letter X in the fifth
character position in a lot number signifies version X.
X
D43257B
Lot number
JAPAN
Data Sheet M10693EJ7V0DS00
2



PD43257B
Ordering Information
Part number
Package
Access time
Supply current
A (MAX.)
Remark
ns (MAX.)
At standby
At data retention
Note
PD43257BCZ-70L
28-PIN PLASTIC DIP
70
50
3
L version
PD43257BCZ-85L
(15.24 mm (600))
85
PD43257BCZ-70LL
70
15
2
LL version
PD43257BCZ-85LL
85
PD43257BGU-70L
28-PIN PLASTIC SOP
70
50
3
L version
PD43257BGU-85L
(11.43 mm (450))
85
PD43257BGU-70LL
70
15
2
LL version
PD43257BGU-85LL
85
Note T
A
40
C, V
CC
= 3.0 V
Data Sheet M10693EJ7V0DS00
3



PD43257B
Pin Configurations (Marking Side)
/xxx indicates active low signal.
28-PIN PLASTIC DIP (15.24 mm (600))
[



PD43257BCZ-xxL ]
[



PD43257BCZ-xxLL ]
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
GND
V
CC
/WE
A13
A8
A9
A11
CE2
A10
/CE1
I/O8
I/O7
I/O6
I/O5
I/O4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A0 - A14
: Address inputs
I/O1 - I/O8
: Data inputs / outputs
/CE1
: Chip Enable 1
CE2
: Chip Enable 2
/WE
: Write Enable
V
CC
: Power supply
GND
: Ground
Remark Refer to Package Drawings for the 1-pin marking.
Data Sheet M10693EJ7V0DS00
4



PD43257B
28-PIN PLASTIC SOP (11.43 mm (450))
[



PD43257BGU-xxL ]
[



PD43257BGU-xxLL ]
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
GND
V
CC
/WE
A13
A8
A9
A11
CE2
A10
/CE1
I/O8
I/O7
I/O6
I/O5
I/O4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A0 - A14
: Address inputs
I/O1 - I/O8
: Data inputs / outputs
/CE1
: Chip Enable 1
CE2
: Chip Enable 2
/WE
: Write Enable
V
CC
: Power supply
GND
: Ground
Remark Refer to Package Drawings for the 1-pin marking.
Data Sheet M10693EJ7V0DS00
5



PD43257B
Block Diagram
Address buffer
Memory cell array
262,144 bits
Input data
controller
A0
A14
I/O8
Sense amplifier /
Switching circuit
Column decoder
/CE1
/WE
CE2
Output data
controller
I/O1
V
CC
GND
Address
buffer
Row
decoder
Truth Table
/CE1
CE2
/WE
Mode
I/O
Supply current
H
Not selected
High impedance
I
SB
L
L
H
H
Read
D
OUT
I
CCA
L
H
L
Write
D
IN
Remark
: V
IH
or V
IL
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