electrical and electrical to optical signal conversion in SDH/SONET fiber optic
receivers and transmitters. A complete chip set solution to develop the electronic part
of OC 12/STM 4 receivers and transmitters is presented.
networks by adding an increasing volume of internet and videophone connections to the
traditional phone and fax services. The following discussion of an OC 12/STM 4
receiver/transmitter chipset supports these developments and includes a description of the
electronic components required for optic/electric (O/E) conversion in SDH/SONET fiber optic
introduction of new and improved products and services in the near future should strengthen
the demand for increased transmission capacity. This need for more data throughput can be
satisfied economically with fiber optic (FO) cables because the transmission capacity is
potentially very high (versus that of copper wires). The physical nature of the fiber cable lets
providers expand capacity by increasing the transmission bit rate or by introducing alternative
transmission techniques, without the need for further upgrades or additional cable installations.
These advantages have led many countries to build extensive fiber networks, and further
expansion of these networks can be expected.
the transmit end, and then converted back to electrical at the receive end. These necessary
conversions are handled by receiver/transmitter units that contain electronic devices along with
the optical components.
up to 10Gbps and is well established in modern transport systems. Today's high-speed fiber
optic transmission systems offer the following standard bit rates:
transmission capacity by sending numerous time-multiplexed data streams over one fiber, using
a different wavelength for each data stream. Electronic components in a WDM receiver and
transmitter (compared with those in a TDM system) differ according to the behavior of the
optical sources and line amplifiers in the WDM transport system. The following section
describes the performance required for receivers and transmitters in an optical TDM
which must then be amplified before their data waveforms and clock can be recovered. A
serial-to-parallel conversion of the data stream may be necessary, depending on the bit rate and
the system-specific setup of the following CMOS functions.
Figure 1. A typical receiver/transmitter unit for SONET/SDH fiber-transmission
current. The PIN diode is relatively cheap and operates with the same supply voltage as the
electronic components, but for a given optical power it generates fewer electrons than the APD.
As a result, the APD provides a more sensitive receiver that can be placed farther away from
the transmitter. This advantage is offset by the need for an APD bias circuit, which (depending
on the APD type) must provide a reverse operating voltage in the 30V to 100V range.
Additionally, the APD adds more noise, costs more, and requires cooling.
first converts the current to a voltage. This single-ended voltage is then amplified by the TIA
and (usually) converted to a differential signal as required by state-of-the-art receivers. The
TIA should provide both high overload tolerance and high input sensitivity (i.e., a large
transmitter aging or long transmission distance (or both), the TIA noise must be reduced to a
minimum. On the other hand, a high overload tolerance is required to avoid bit errors due to
distortion in the presence of strong optical signals. Further, the TIA's maximum achievable gain
depends on the operating frequency. To ensure stable operation and the required bandwidth,
gain can be optimized only within a narrow range. This limitation may cause the output voltage
resulting from low-power optical signals to be insufficient for further processing. To amplify
small TIA voltages in the 1mV to 2mV range, the TIA function must be followed by a
postamplifier, which in most cases is a limiting amplifier (LA).
maximum is independent of the input signal strength. Also included is a loss-of-power indicator
(LOP) that warns when the incoming signal falls below a user-defined threshold. As a system-
dependent parameter, this threshold must be adjusted externally. A comparator with hysteresis
ensures chatter-free operation for the LOP flag when the signal is close to the threshold level.
recovery (CDR) circuit. The CDR performs timing and amplitude-level decisions on the
incoming signal, which leads to a time- and amplitude-regenerated data stream. First to be
recovered from the received signal is the clock. Several possibilities can support this clock-
recovery function (external SAW filter, external reference clock, etc.), but only the fully
integrated approach can save both cost and effort.
recommended by the International Telecommunication Union-Telecom Standards Sector (ITU-
T). Jitter refers to the effect in which individual bit transitions ("0" to "1" and vice-versa) are
not exactly in phase. The effect becomes visual in an "eye diagram," in which several pseudo-
random bit-pattern sequences are superimposed. An eye diagram illustrates the quality of a data
stream in terms of the eye opening, measured using the "eye mask" (
Figure 2. An "eye diagram" illustrates the signal quality of a data stream.
Signal quality at the LA output (as represented by the eye opening) is usually low, mostly as a
consequence of nonideal components in the optical transmission system. Because the CDR
must accept a certain amount of input data jitter to achieve normal error-free operation, all
receiver units in line-termination and regenerator applications must comply with the ITU-T
recommendations for jitter tolerance.
and jitter generation is that produced by the CDR itself. The ITU-T specs for these two
parameters must be met for regenerators in a long-haul system, because at each stage the
recovered clock enables transmission to the next regenerator, allowing jitter contributions to
accumulate from regenerator to regenerator. Conversely, for line-termination receivers (which
are in the majority of applications) the jitter transfer and jitter generation need not meet ITU-T
recommendations. In those applications, the regenerated data is synchronized to the system
received bits can be clocked for the purpose of sensing their logic level. The use of a phase-
locked loop (PLL) is essential in synchronizing the clock with the data stream, to ensure
alignment of the clock with the middle of a data word. To further optimize the bit error rate
(BER) in the presence of asymmetrical rise and fall transitions of the received data signal, the
system should include an option to adjust the phase relation between clock and data.
locked to the received data stream. The CDR's serial stream of regenerated data and the
recovered clock signal are usually fed to a deserializer, whose conversion ratio depends on the
data's bit rate and the interface capability (speed) of the CMOS system components. The
serial data stream to the different deserializer outputs, the deserializer should include bit-
from the CMOS system components to an optical data stream. As shown in Figure 1, it contains
a serializer with clock synthesizer (which depends on the system setup and transmission bit
rate), a driver, and an optical source.
over a fiber cable in telecommunication networks. Within an optical window, the signals
benefit from a lower impact on quality (less dispersion) and less attenuation per unit of fiber
length. The range between 1000nm and 1300nm, called the second optical window, is known
for low dispersion-as low as 0dB. The range from 1500nm to 1800nm, known as the third
optical window, offers the lowest attenuation per unit of fiber length (