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Datasheet: ZSP540 (LSI Logic Corp.)

High Performance, Low-power, Synthesizable DSP CoreThe ZSP540 processor core isA high-p...

 

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ZSP540 - Highly Efficient
Quad-MAC DSP Core
O V E R V I E W
The ZSP540 processor core is a high-performance/power-efficient Quad-
MAC/Six-ALU implementation of the ZSP
G2 architecture. The ZSP540 utilizes a
16-bit architecture with extensive 32-bit capabilities and sets an unmatched
balance of performance/power/size and memory utilization efficiency. The
Z.Turbo feature provides the SOC designer with the option to extend the ZSP540
Instruction Set and the ability to add application-specific acceleration logic.
T A R G E T M A R K E T S
2.5/3G wireless baseband processing
Multimedia wireless and mobile devices
Cable/xDSL
Wireless LAN (WLAN)
Set-top box and home gateways
Multi-channel Voice Over IP (VoIP)
Software Defined Radio (SDR)
A P P L I C A T I O N B E N E F I T S
High-performance DSP capabilities
Excellent power/cost/speed balance
Excellent multimedia audio/video processing
Power efficient baseband processing performance
DSP and system control functions handling capabilities
C O R E F E A T U R E S
Quad-MAC/Six-ALU DSP core
4+1 instructions per cycle
Up to 350MHz, 8-stage pipeline design
Up to 1750 million instructions/sec
Dual 64-bit wide Load/Store data ports
Z.Turbo coprocessor extensions capable
24-bit address space
HW managed instructions scheduling
HW/SW controlled power management
Real-time trace and profiling capability
Full AMBA/AHB support (optional)
JTAG debug interface
Static, single phase clocked design
Compatible with all other ZSP cores
A R C H I T E C T U R E F E A T U R E S
Embedded control processing efficiency
32-bit addressing capabilities
16 and 32-bit standard instruction set
Extensive 32-bit and 40-bit support
Easy to program instruction set
Load/store register based instructions
Outstanding code density
User extensible instruction set
S U P P O R T
Highly optimized C-compiler
Multimedia, voice and wireless experts
Local support by ZSP solution experts
40-bit
ALU
16x16
MAC
16x16
MAC
Multiply/ALU Unit 0
40-bit
ALU
16x16
MAC
16x16
MAC
Multiply/ALU Unit 1
Bypass Logic
16-bit
ALU
16-bit
ALU
Timers
ALU Unit
Pipeline
Control Unit
(PCU)
Register File
Instruction
Sequence Unit
(ISU)
Prefetch Unit (PFU)
Interrupt Control
Co-Processor IF
Debug IF
File
Instruction Cache
Load/Store Unit (LSU)
Dual AGU
128-bit
64-bit
64-bit
ZSP540 Highly Efficient Quad-MAC DSP Core
Z S P 5 4 0 Q U A D - M A C D S P P R O C E S S I N G S O L U T I O N
LSI Logic ZSP cores are licensable and available as a fully synthesizable and
technology independent. The ZSP Cores have been proven in ASICs and are also
available as standard general-purpose DSP and Application Specific Standard
Products (ASSP) from LSI Logic and licensees of the ZSP cores.
The ZSP540 is power-efficient/high-performance Quad-MAC DSP core
implementation of the ZSP G2 architecture version and is software compatible
with all other ZSP cores enabling code reuse and effortless design migration
and scalability.
The ZSP540 features instruction grouping, instruction parallelism and pipeline control
all done by hardware making it seamless and easy to program. Highly optimized
C-Compilers are available minimizing the need for assembly level programming.
S O C I N T E G R A T I O N S U P P O R T
ZSP cores are available as a synthesizable, fully static/single-phased design
AMBA/AHB (optional) or native ZSP bus interfaces are available
Co-verification and System modeling support available by various providers
A V A I L A B L E G 2 S O F T W A R E D E V E L O P M E N T S O L U T I O N S
Highly optimized development kits are available from LSI Logic and Green Hills
Multi-core ARM/ZSP support is available through Green Hill and ARM's RealView
JTAG probes for single/multi-core support available from various providers
Embedded real-time trace and application profiling supported
ZOpen
TM
software development framework enables rapid integration and
reuse of software modules developed by different 3rd parties
A V A I L A B L E G 2 H A R D W A R E D E V E L O P M E N T S O L U T I O N S
Architecture evaluation boards
Standalone FPGA prototyping boards
ARM Integrator core modules available
Multi-media audio/video development platform
Audio development platform
S O F T W A R E C O M P A T I B L E Z S P C O R E S
For more information please call:
LSI Logic Corporation
Headquarters
1621 Barber Lane
Milpitas, CA 95035
Tel: 866.574.5741
(within U.S. and Canada)
1.408.954.3108
(outside U.S. and Canada)
Technical Support: 800.633.4545
Corporate Website
www.lsilogic.com
Sales Office Locations
www.lsilogic.com/contacts
Additional information on the
ZSP540 is available at:
http://www.zsp.com/zsp540.html
LSI Logic logo design, ZOpen and ZSP are
trademarks or registered trademarks of LSI
LogicCorporation. AMBA is a registered trademark
ofARM Ltd. All other brand and product names
maybe trademarks of their respective companies.
LSI Logic Corporation reserves the right to
makechanges to any products and services herein
at anytime without notice. LSI Logic does not
assume anyresponsibility or liability arising out of
theapplication or use of any product or
servicedescribed herein, except as expressly
agreed to inwriting by LSI Logic; nor does the
purchase, lease,or use of a product or service from
LSI Logicconvey a license under any patent
rights,copyrights, trademark rights, or any other of
theintellectual property rights of LSI Logic or of
thirdparties.
Copyright 2004 by LSI Logic Corporation.
All rights reserved.
Order No. R20101
1004.LR.Web - Printed in USA
# M A C s
Single
Dual
Dual
Quad
Quad
#ALUs
Dual
Dual
Triple
Six
Six
Inst./Cycle
2+1
4-issue
4-issue
4+1
6-issue
Max Freq
(MHz@0.13u)
220 2 2 0
3 5 0
3 5 0
3 0 0
C O R E
Z S P 2 0 0
Z S P 4 0 0
Z S P 5 0 0
Z S P 5 4 0
Z S P 6 0 0
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