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Datasheet: AD4016M321VLA-5 (International Power Sources)

Low Voltage Operation is More Suitable to be Used on Battery Backup, Portable Electronic

 

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Rev.1
Page 1
ASCEND
Semiconductor
4Mx4 EDO
Data sheet
Rev.1
Page 2
AD 40 4M 4 2 V S A 5
Ascend
Semiconductor
EDO/FPM
: 40
D-RAMBUS
: 41
DDRSDRAM
: 42
DDRSGRAM
: 43
SGRAM
: 46
SDRAM
: 48
Density
16M
: 16 Mega Bits
8M : 8 Mega Bits
4M : 4 Mega Bits
2M : 2 Mega Bits
1M : 1 Mega Bit
Package
Organization
4: x4
8 : x8
9 : x9
16 : x16
18 : x18
32 : x32
Revision
A :
1st B : 2nd
C : 3rd D :4th
Min Cycle Time ( Max Freq.)
-5
: 5ns ( 200MHz )
-6 : 6ns ( 167MHz )
-7 : 7ns ( 143MHz )
-75 : 7.5ns ( 133MHz )
-8 : 8ns ( 125MHz )
-10 : 10ns ( 100MHz )
EDO : -5 (50 ns)
-6 (60 ns)
Interface
V: 3.3V
R: 2.5V
C: CSP B: uBGA
T: TSOP Q: TQFP
P: PQFP ( QFP )
L: LQFP S: SOJ
Refresh
1 : 1K 8 : 8K
2 : 2K 6 :16K
4 : 4K
Rev.1
Page 3
Description
The device CMOS Dynamic RAM organized as 4,194,304 words x 4 bits with extended data out access
mode. It is fabricated with an advanced submicron CMOS technology and designed to operate from a single
3.3V oniy power supply. Low voltage operation is more suitable to be used on battery backup, portable elec-
tronic application. lt is packaged in JEDEC standard 26/24-pin plastic SOJ or TSOP(II).
Features
Single 3.3V(
%) only power supply
High speed t
RAC
acess time: 50/60ns
Low power dissipation
- Active mode : 432/396 mW (Mas)
- Standby mode: 0.54 mW (Mas)
Extended - data - out(EDO) page mode access
I/O level: CMOS level (Vcc = 3.3V)
2048 refresh cycle in 32 ms(Std.) or 128 ms(S-version)
4 refresh modesh:
- RAS only refresh
- CAS - before - RAS refresh
- Hidden refresh
- Self-refresh(S-version)
10
Rev.1
Page 4
Pin Name
Function
A0-A10
Address inputs
- Row address
- Column address
- Refresh address
DQ1~DQ4
Data-in / data-out
RAS
Row address strobe
CAS
Column address strobe
WE
Write enable
OE
Output enable
Vcc
Power (+ 3.3V)
Vss
Ground
VCC
1
DQ1
2
DQ2
3
DQ3
4
DQ4
5
VCC
6
8
9
10
11
NC
12
WE
13
A0
A1
17
A2
18
A3
19
VSS
RAS
CAS
OE
A8
A7
A6
A5
A4
VSS
A
D
4
0
4
M
4
2
V
S
Pin Description
Pin Configuration
21
22
23
24
25
26
15
14
16
A10
26/24-PIN 300mil Plastic SOJ
A9
VCC
1
DQ1
2
DQ2
3
DQ3
4
DQ4
5
VCC
6
8
9
10
11
NC
12
WE
13
A0
A1
17
A2
18
A3
19
VSS
RAS
CAS
OE
A8
A7
A6
A5
A4
VSS
A
D
4
0
4
M
4
2
V
T
21
22
23
24
25
26
15
14
16
A10
26/24-PIN 300mil Plastic TSOP (ll)
A9
A0-A10
A0-A10
A0-A10
Rev.1
Page 5
WE
CAS
NO. 2 CLOCK
GENERATOR
COLUMN
ADDRESS
BUFFERS (11)
REFRESH
CONTROLLER
REFRESH
COUNTER
BUFFERS (11)
ADDRESS
ROW
NO. 1 CLOCK
GENERATOR
A0
RAS
A1
A2
A3
A4
A5
A6
A7
A8
CONTROL
LOGIC
DATA-IN BUFFER
DATA-OUT
BUFFER
OE
DQ1
.
DQ4
.
COLUMN
DECODER
2048
SENSE AMPLIFIERS
I/O GATING
2048x4
2048x2048x4
MEMORY
ARRAY
2
0
4
8
R
O
W
D
E
C
O
D
E
R
Vcc
Vss
Block Diagram
A9
A10
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