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Datasheet: J110 (Fairchild Semiconductor)

N-Channel Switch

 

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Fairchild Semiconductor
2002 Fairchild Semiconductor Corporation
Rev. B, July 2002
J1
08/
J109/
J110/
MMBF
J
1
0
8
Absolute Maximum Ratings *
T
A
=25
C unless otherwise noted
* These ratings are limiting values above which the serviceability of any semiconductor device may be impaired.
NOTES:
1) These ratings are based on a maximum junction temperature of 150 degrees C.
2) These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations.
Electrical Characteristics
T
A
=25
C unless otherwise noted
* Pulse Test: Pulse Width
300
s, Duty Cycle
2.0%
Symbol
Parameter
Value
Units
V
DG
Drain-Gate Voltage
25
V
V
GS
Gate-Source Voltage
-25
V
I
GF
Forward Gate Current
10
mA
T
J
, T
stg
Operating and Storage Junction Temperature Range
-55 ~ +150
C
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Units
Off Characteristics
V
(BR)GSS
Gate-Source Breakdwon Voltage
I
G
= -10
A, V
DS
= 0
-25
V
I
GSS
Gate Reverse Current
V
GS
= -15V, V
DS
= 0
V
GS
= -15V, V
DS
= 0, T
A
= 100
C
-3.0
-200
nA
nA
V
GS
(off)
Gate-Source Cutoff Voltage
V
DS
= 15V, I
D
= 10nA 108
109
110
-3.0
-2.0
-0.5
-10
-6.0
-4.0
V
V
V
On Characteristics
I
DSS
Zero-Gate Voltage Drain Current *
V
DS
= 15V, I
GS
= 0 108
109
110
80
40
10
mA
mA
mA
r
DS
(on)
Drain-Source On Resistance
V
DS
0.1V, V
GS
= 0 108
109
110
8.0
12
18
Small Signal Characteristics
C
dg
(on)
C
sg
(off)
Drain Gate & Source Gate On
Capacitance
V
DS
= 0, V
GS
= 0, f = 1.0MHz
85
pF
C
dg
(on)
Drain-Gate Off Capacitance
V
DS
= 0, V
GS
= -10, f = 1.0MHz
15
pF
C
sg
(off)
Source-Gate Off Capacitance
V
DS
= 0, V
GS
= -10, f = 1.0MHz
15
pF
J108/J109/J110/MMBFJ108
N-Channel Switch
This device is designed for digital switching
applications where very low on resistance is
mandatory.
Sourced from Process 58.
1. Drain 2. Source 3. Gate
1
2
3
TO-92
1
1. Drain 2. Source 3. Gate
SuperSOT-3
2002 Fairchild Semiconductor Corporation
Rev. B, July 2002
J1
08/
J109/
J110/
MMBF
J
1
0
8
Thermal Characteristics
T
A
=25
C unless otherwise noted
* Device mounted on FR-4 PCB 1.6"
1.6"
0.06"
Symbol
Parameter
Max.
Units
J108 - 110
*MMBFJ108
P
D
Total Device Dissipation
Derate above 25
C
625
5.0
350
2.8
mW
mW/
C
R
JC
Thermal Resistance, Junction to Case
125
C/W
R
JA
Thermal Resistance, Junction to Ambient
357
556
C/W
2002 Fairchild Semiconductor Corporation
Rev. B, July 2002
J1
08/
J109/
J110/
MMBF
J
1
0
8
Typical Characteristics
Figure 1. Common Drain-Source
Figure 2. Parameter Interactions
Figure 3. Common Drain-Source
Figure 4. Common Drain-Source
Figure 5. Normalized Drain Resistance vs
Bias Voltage
Figure 6. Noise Voltage vs Frequency
0
0.4
0.8
1.2
1.6
2
0
20
40
60
80
100
V - DRAIN-SOURCE VOLTAGE (V)
I
-
DR
A
I
N C
U
R
R
E
N
T

(
m
A
)
DS
D
T = 25
TYP V = - 5.0 V
GS(off)
A
- 4.0 V
- 5.0 V
- 3.0 V
- 2.0 V
- 1.0 V
V = 0 V
GS



C
0.1
0.5
1
5
10
5
10
50
100
10
50
100
500
1,000
V - GATE CUTOFF VOLTAGE (V)
r
- DRA
I
N

"
O
N"
RE
SI
ST
A
N
C
E
GS (OFF)
DS
I @ V = 5.0V, V = 0 PULSED
r @ V = 100mV, V = 0
V @ V = 5.0V, I = 3.0 nA
GS(off)
DSS
r
DS
I
DSS
(



)
DS
DS
D
GS
GS
DS
S
I
- DRA
I
N
CURRE
NT
(m
A
)
DS
DS
_
_
_
_
_
-20
-16
-12
-8
-4
0
10
100
V - GATE-SOURCE VOLTAGE (V)
C
(C
) - C
A
P
A
CIT
A
N
C
E
(p
F
)
GS
ts
C (V = 5.0V)
iss
f = 0.1 - 1.0 MHz
DS
C (V = 0 )
rss
DS
rs
0
1
2
3
4
5
0
10
20
30
40
50
V - DRAIN-SOURCE VOLTAGE (V)
I
-
DR
A
I
N CU
RR
ENT
(
m
A
)
DS
D
- 0.4 V - 0.5 V
- 0.3 V
- 0.2 V
- 0.1 V
V = 0 V
GS
T = 25
TYP V = - 0.7 V
GS(off)
A



C
0
0.2
0.4
0.6
0.8
1
1
2
5
10
20
50
100
V /V - NORMALIZED GATE-SOURCE VOLTAGE (V)
r
- N
O
R
M
A
L
IZ
E
D
RE
S
I
S
T
A
N
C
E
GS
DS
r =
DS
V @ 5.0V, 10



A
GS(off)
r
DS
________
V
GS(off)
V
GS
1 -
GS(off)
0.01 0.03
0.1
0.5 1
2
10
100
1
5
10
50
100
f - FREQUENCY (kHz)
e
- NO
ISE VO
L
T
A
G
E

(n
V /
Hz)
n
V = 10V
BW = 6.0 Hz @ f = 10 Hz, 100 Hz
= 0.21 @ f



1.0 kHz
DG
I = 10 mA
D
I = 1.0 mA
D



2002 Fairchild Semiconductor Corporation
Rev. B, July 2002
J1
08/
J109/
J110/
MMBF
J
1
0
8
Typical Characteristics
(Continued)
Figure 7. Switching Turn-On Time vs
Gate-Source Cutoff Voltage
Figure 8. Switching Turn-On Time vs Drain Current
Figure 9. On Resistance vs Drain Current
Figure 10. Output Conductance vs Drain Current
Figure 11. Transconductance vs Drain Current
Figure 12. Power Dissipation vs Ambient Temperature
-10
-8
-6
-4
-2
0
0
2
4
6
8
10
V - GATE-SOURCE CUTOFF VOLTAGE (V)
t
- TU
R
N
-O
N

TIME
(ns)
T = 25
V = 1.5V
V = - 12V
GS(off)
A
DD
I = 30 mA
D
I = 10 mA
D



C
GS(off)
ON
0
5
10
15
20
25
0
10
20
30
40
50
I - DRAIN CURRENT (mA)
t
-
T
URN-OF
F
T
I
M
E
(n
s)
D
OF
F
V = - 8.5V
V = - 5.5V
V = - 3.5V
GS(off)
GS(off)
GS(off)
T = 25
V = 1.5V
V = - 12V
GS(off)
A
DD



C
1
10
100
1
5
10
50
100
I - DRAIN CURRENT (mA)
r
-

DR
A
I
N "
O
N"

RE
S
I
ST
A
N
C
E
D
DS
V = - 3.0V
GS(off)
25
(



)
125
25
125
V = - 5.0V
GS(off)
V = 0
GS
- 55



C



C



C



C



C
0.1
1
10
1
10
100
I - DRAIN CURRENT (mA)
g

- OUT
P
U
T
CONDU
CT
A
NCE (
mh
o
s
)
D
os
V
GS(off)
T = 25
f = 1.0 kHz
V = 5.0V
DG



A
10V
15V
20V
5.0V
5.0V
10V
15V
20V
- 4.0V
10V
15V
20V
- 2.0V
- 1.0V



C
0.1
1
10
1
10
100
I - DRAIN CURRENT (mA)
g
-
T
R
A
N
SCONDUCT
A
NCE (mmh
o
s
)
D
fs
V = - 1.0V
V = - 3.0V
V = - 5.0V
GS(off)
GS(off)
GS(off)
T = 25
V = 10V
f = 1.0 kHz
A
DG
T = - 55
T = 25
T = 125
A
A
A



C



C



C



C
0
2 5
5 0
7 5
1 0 0
1 2 5
1 5 0
0
1 0 0
2 0 0
3 0 0
4 0 0
5 0 0
6 0 0
7 0 0
S u p e rS O T -3
T O -9 2
P
D
-
P
O
W
E
R
DI
S
S
I
P
AT
I
O
N(
m
W
)
T E M P E R A T U R E (
o
C )
Package Demensions
J1
08/
J109/
J110/
MMBF
J
1
0
8
Dimensions in Millimeters
2002 Fairchild Semiconductor Corporation
Rev. B, July 2002
0.46
0.10
1.27TYP
(R2.29)
3.86MAX
[1.27
0.20
]
1.27TYP
[1.27
0.20
]
3.60
0.20
14.47
0.40
1.02
0.10
(0.25)
4.58
0.20
4.58
+0.25
0.15
0.38
+0.10
0.05
0.38
+0.10
0.05
TO-92
2002 Fairchild Semiconductor Corporation
Rev. B, July 2002
J1
08/
J109/
J110/
MMBF
J
1
0
8
Package Demensions
(Continued)
Dimensions in Millimeters
SuperSOT-3
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
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