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Datasheet: J174-J177 (Calogic, LLC)

30 V, P-channel JFET Switch

 

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Calogic, LLC
P-Channel JFET Switch
J174 J177 / SST174 SST177
FEATURES

Low Insertion Loss

No Offset or Error Generated By Closed Switch
-
Purely Resistive
-
High Isolation Resistance From Driver

Short Sample and Hold Aperture Time

Fast Switching
APPLICATIONS

Analog Switches

Choppers

Commutators
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25
o
C unless otherwise specified)
Gate-Drain or Gate-Source Voltage . . . . . . . . . . . . . . . . . 30V
Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Storage Temperature Range . . . . . . . . . . . . . -55
o
C to +150
o
C
Operating Temperature Range . . . . . . . . . . . -55
o
C to +135
o
C
Lead Temperature (Soldering, 10sec) . . . . . . . . . . . . . . 300
o
C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 350mW
Derate
above
25
o
C . . . . . . . . . . . . . . . . . . . . . . . 3.3mW/
o
C
NOTE: Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
ORDERING INFORMATION
Part
Package
Temperature Range
J174-J177
Plastic TO-92
-55
o
C to +135
o
C
SST174-SST177
Plastic SOT-23
-55
o
C to +135
o
C
For Sorted Chips in Carriers see 2N5114 series.
CORPORATION
PIN CONFIGURATION
TO-92
S
G
D
SOT-23
G
S
D
PRODUCT MARKING (SOT-23)
SST174
P04
SST175
P05
SST176
P06
SST177
P07
5508
CORPORATION
ELECTRICAL CHARACTERISTICS (T
A
= 25
o
C unless otherwise specified)
SYMBOL PARAMETER
J174
J175
J176
J177
UNITS
TEST CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX
I
GSS
Gate Reverse
Current
(Note 1)
1
1
1
1
nA
V
DS
= 0, V
GS
= 20V
V
GS(off)
Gate Source
Cutoff Voltage
5
10
3
6
1
4
0.8
2.25
V
V
DS
= -15V, I
D
= -10nA
BV
GSS
Gate Source
Breakdown
Voltage
30
30
30
30
V
DS
= 0, I
G
= 1
A
I
DSS
Drain
Saturation
Current
(Note 2)
-20
-135 -7
-70
-2
-35 -1.5
-20
mA
V
DS
= -15V, V
GS
= 0
I
D(off)
Drain Cutoff
Current
(Note 1)
-1
-1
-1
-1
nA
V
DS
= -15V, V
GS
= 10V
r
DS(on)
Drain-Source
ON Resistance
85
125
250
300
V
GS
= 0, V
DS
= -0.1V
C
dg(off)
Drain-Gate
OFF
Capacitance
5.5
5.5
5.5
5.5
pF
V
DS
= 0,
V
GS
= 10V
f = 1MHz (Note 3)
C
sg(off)
Source-Gate
OFF
Capacitance
5.5
5.5
5.5
5.5
C
dg(on)
+ C
sg(on)
Drain-Gate
Plus Source
Gate ON
Capacitance
32
32
32
32
V
DS
= V
GS
= 0
t
d(on)
Turn On Delay
Time
2
5
15
20
ns
Switching Time Test Conditions
(Note 3)
J174
J175
J176
J177
V
DD
-10V
-6V
-6V
-6V
V
GS(off)
12V
8V
3V
3V
R
L
560
12k
5.6k
10k
V
GS(on)
0V
0V
0V
0V
t
r
Rise Time
5
10
20
25
t
d(off)
Turn Off Delay
Time
5
10
15
20
t
f
Fall Time
10
20
20
25
NOTES: 1. Approximately doubles for every 10
o
C increase in T
A
.
2. Pulse test duration -300
s; duty cycle
3%.
3. For design reference only, not 100% tested.
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