HTML datasheet archive (search documentation on electronic components) Search datasheet (1.687.043 components)
Search field

Datasheet: 29F800 (Advanced Micro Devices)

8 Megabit (1 M X 8-bit/512 K X 16-bit) Cmos 5.0 Volt-only, Boot Sector Flash Memory-die Revision 1

 

Download: PDF   ZIP
Advanced Micro Devices

Document Outline

SUPPLEMENT
5/4/98
Publication# 21631
Rev: A Amendment/+2
Issue Date: April 1998
Am29F800B Known Good Die
8 Megabit (1 M x 8-Bit/512 K x 16-Bit)
CMOS 5.0 Volt-only, Boot Sector Flash Memory--Die Revision 1
DISTINCTIVE CHARACTERISTICS
s
Single power supply operation
-- 5.0 Volt-only operation for read, erase, and
program operations
-- Minimizes system level requirements
s
Manufactured on 0.35 m process technology
-- Compatible with 0.5 m Am29F800 device
s
High performance
-- 90 or 120 ns access time
s
Low power consumption (typical values at 5
MHz)
-- 1
A standby mode current
-- 20 mA read current (byte mode)
-- 28 mA read current (word mode)
-- 30 mA program/erase current
s
Flexible sector architecture
-- One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
fifteen 64 Kbyte sectors (byte mode)
-- One 8 Kword, two 4 Kword, one 16 Kword, and
fifteen 32 Kword sectors (word mode)
-- Supports full chip erase
-- Sector Protection features:
A hardware method of locking a sector to
prevent any program or erase operations within
that sector
Sectors can be locked via programming
equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
s
Top or bottom boot block configurations
available
s
Embedded Algorithms
-- Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
-- Embedded Program algorithm automatically
writes and verifies data at specified addresses
s
Minimum 1,000,000 write cycles per sector
guaranteed
s
Compatibility with JEDEC standards
-- Pinout and software compatible with single-
power-supply Flash
-- Superior inadvertent write protection
s
Data# Polling and toggle bits
-- Provides a software method of detecting
program or erase operation completion
s
Ready/Busy# pin (RY/BY#)
-- Provides a hardware method of detecting
program or erase cycle completion
s
Erase Suspend/Erase Resume
-- Suspends an erase operation to read data from,
or program data to, a sector that is not being
erased, then resumes the erase operation
s
Hardware reset pin (RESET#)
-- Hardware method to reset the device to reading
array data
2
Am29F800B Known Good Die
5/4/98
S U P P L E M E N T
GENERAL DESCRIPTION
The Am29F800B in Known Good Die (KGD) form is a
8 Mbit, 5.0 volt-only Flash memory. AMD defines KGD
as standard product in die form, tested for functionality
and speed. AMD KGD products have the same relia-
bility and quality as AMD products in packaged form.
Am29F800B Features
The Am29F800B is an 8 Mbit, 5.0 volt-only Flash
memory organized as 1,048,576 bytes or 524,288
w o r d s . T h e w o r d - w i d e d a t a ( x 1 6 ) a p p e a r s o n
DQ15DQ0; the byte-wide (x8) data appears on
DQ7DQ0. This device is designed to be programmed
in-system with the standard system 5.0 volt V
CC
supply. A 12.0 V V
PP
is not required for write or erase
operations. The device can also be programmed in
standard EPROM programmers.
This device is manufactured using AMD's 0.35 m
process technology, and offers all the features and ben-
efits of the Am29F800, which was manufactured using
0.5 m process technology.
To eliminate bus contention the device has separate
chip enable (CE#), write enable (WE#) and output
enable (OE#) controls.
The device requires only a single 5.0 volt power sup-
ply
for both read and write functions. Internally gener-
ated and regulated voltages are provided for the
program and erase operations.
The device is entirely command set compatible with the
JEDEC single-power-supply Flash standard. Com-
mands are written to the command register using
standard microprocessor write timings. Register con-
tents serve as input to an internal state-machine that
controls the erase and programming circuitry. Write
cycles also internally latch addresses and data needed
for the programming and erase operations. Reading
data out of the device is similar to reading from other
Flash or EPROM devices.
Device programming occurs by executing the program
command sequence. This initiates the Embedded
Program
algorithm--an internal algorithm that auto-
matically times the program pulse widths and verifies
proper cell margin.
Device erasure occurs by executing the erase com-
mand sequence. This initiates the Embedded Erase
algorithm--an internal algorithm that automatically
preprograms the array (if it is not already programmed)
before executing the erase operation. During erase, the
device automatically times the erase pulse widths and
verifies proper cell margin.
The host system can detect whether a program or
erase operation is complete by observing the RY/BY#
pin, or by reading the DQ7 (Data# Polling) and DQ6
(toggle) status bits. After a program or erase cycle has
been completed, the device is ready to read array data
or accept another command.
The sector erase architecture allows memory sectors
to be erased and reprogrammed without affecting the
data contents of other sectors. The device is fully
erased when shipped from the factory.
Hardware data protection measures include a low
V
CC
detector that automatically inhibits write opera-
tions during power transitions. The hardware sector
protection
feature disables both program and erase
operations in any combination of the sectors of mem-
ory. This can be achieved via programming equipment.
The Erase Suspend feature enables the user to put
erase on hold for any period of time to read data from,
or program data to, any sector that is not selected for
erasure. True background erase can thus be achieved.
The hardware RESET# pin terminates any operation
in progress and resets the internal state machine to
reading array data. The RESET# pin may be tied to the
system reset circuitry. A system reset would thus also
reset the device, enabling the system microprocessor
to read the boot-up firmware from the Flash memory.
The system can place the device into the standby
mode
. Power consumption is greatly reduced in
this mode.
AMD's Flash technology combines years of Flash
memory manufacturing experience to produce the
h i g h e s t l eve l s o f q u a l i t y, r e l i a b i l i t y a n d c o s t
effectiveness. The device electrically erases all
b i t s w i t h i n a s e c t o r s i m u l t a n e o u s l y v i a
F o w l e r -N o r d h e i m t u n n e l i n g . T h e d a t a i s
programmed using hot electron injection.
ELECTRICAL SPECIFICATIONS
Refer to the Am29F800B data sheet, PID 21504, for full
electrical specifications on the Am29F800B in KGD
form.
5/4/98
Am29F800B Known Good Die
3
S U P P L E M E N T
PRODUCT SELECTOR GUIDE
DIE PHOTOGRAPH
DIE PAD LOCATIONS
Family Part Number
Am29F800B KGD
Speed Option (V
CC
= 5.0 V
10%)
-90
-120
Max access time, ns (t
ACC
)
90
120
Max CE# access time, ns (t
CE
)
90
120
Max OE# access time, ns (t
OE
)
35
50
Orientation relative
to leading edge of
tape and reel
Orientation relative
to top left corner of
Gel-Pak
21
20
19
18
17
16
15
14
9
8
7
6
5
4
3
2
1
44 43 42 41 40 39 38 37
AMD logo location
31
30
29
28
27
26
25
24
23
22
36
10
11
12
35
34
33
13
32
4
Am29F800B Known Good Die
5/4/98
S U P P L E M E N T
PAD DESCRIPTION
Note: The coordinates above are relative to the center of pad 1 and can be used to operate wire bonding equipment.
Pad
Signal
Pad Center (mils)
Pad Center (millimeters)
X
Y
X
Y
1
V
CC
0.00
0.00
0.0000
0.0000
2
DQ4
7.22
0.00
0.1835
0.0000
3
DQ12
13.45
0.00
0.3417
0.0000
4
DQ5
19.59
0.00
0.4977
0.0000
5
DQ13
25.82
0.00
0.6559
0.0000
6
DQ6
31.96
0.00
0.8119
0.0000
7
DQ14
38.19
0.00
0.9701
0.0000
8
DQ7
44.33
0.00
1.1261
0.0000
9
DQ15/A-1
50.56
0.00
1.2843
0.0000
10
V
SS
58.61
1.42
1.4887
0.0361
11
BYTE#
60.50
6.84
1.5367
0.1738
12
A16
60.50
18.99
1.5367
0.4823
13
A15
60.13
279.88
1.5274
7.1090
14
A14
53.99
279.88
1.3714
7.1090
15
A13
48.28
279.88
1.2264
7.1090
16
A12
42.14
279.88
1.0704
7.1090
17
A11
36.43
279.88
0.9254
7.1090
18
A10
30.29
279.88
0.7694
7.1090
19
A9
24.58
279.62
0.6244
7.1024
20
A8
18.34
279.88
0.4659
7.1090
21
WE#
12.63
279.88
0.3209
7.1090
22
RESET#
2.54
283.85
0.0646
7.2098
23
RY/BY#
10.00
283.85
0.2538
7.2098
24
A18
20.07
279.88
0.5096
7.1090
25
A17
25.78
279.88
0.6546
7.1090
26
A7
31.92
279.88
0.8106
7.1090
27
A6
37.63
279.88
0.9556
7.1090
28
A5
43.77
279.88
1.1116
7.1090
29
A4
49.48
279.88
1.2566
7.1090
30
A3
55.62
279.88
1.4126
7.1090
31
A2
61.33
279.88
1.5576
7.1090
32
A1
67.47
279.88
1.7136
7.1090
33
A0
67.84
18.99
1.7229
0.4823
34
CE#
67.84
6.84
1.7229
0.1738
35
V
SS
67.84
4.00
1.7229
0.1015
36
OE#
57.84
2.39
1.4691
0.0608
37
DQ0
49.86
0.00
1.2661
0.0000
38
DQ8
43.63
0.00
1.1082
0.0000
39
DQ1
37.49
0.00
0.9522
0.0000
40
DQ9
31.26
0.00
0.7940
0.0000
41
DQ2
25.12
0.00
0.6380
0.0000
42
DQ10
18.89
0.00
0.4798
0.0000
43
DQ3
12.75
0.00
0.3238
0.0000
44
DQ11
6.52
0.00
0.1656
0.0000
5/4/98
Am29F800B Known Good Die
5
S U P P L E M E N T
ORDERING INFORMATION
Standard Products
AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is
formed by a combination of the following:
Valid Combinations
Valid Combinations list configurations planned to be sup-
ported in volume for this device. Consult the local AMD sales
office to confirm availability of specific valid combinations and
to check on newly released combinations.
Am29F800B
DEVICE NUMBER/DESCRIPTION
Am29F800B Known Good Die
8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS Flash Memory--Die Revision 1
5.0 Volt-only Program and Erase
-90
DP
C
1
DIE REVISION
This number refers to the specific AMD manufacturing
process and product technology reflected in this doc-
ument. It is entered in the revision field of AMD stand-
ard product nomenclature.
TEMPERATURE RANGE
C = Commercial (0
C to +70
C)
I = Industrial (40
C to +85
C)
E = Extended (55
C to +125
C)
PACKAGE TYPE AND
MINIMUM ORDER QUANTITY
DP =
Waffle Pack
180 die per 5 tray stack
DG =
Gel-Pak
Die Tray
378 die per 6 tray stack
DT
=
SurftapeTM (Tape and Reel)
1800 per 7-inch reel
DW = Gel-Pak
Wafer Tray (sawn wafer on frame)
Call AMD sales office for minimum order quantity
SPEED OPTION
See Valid Combinations
BOOT CODE SECTOR ARCHITECTURE
T = Top sector
B = Bottom sector
T
Valid Combinations
Am29F800BT-90,
Am29F800BB-90,
DPC 1, DPI 1, DPE 1,
DGC 1, DGI 1, DGE 1,
DTC 1, DTI 1, DTE 1,
DWC 1, DWI 1, DWE 1
Am29F800BT-120
Am29F800BB-120
© 2019 • ICSheet
Contact form
Main page