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Datasheet: I2814A-08TR (Alliance Semiconductor Corporation)

Low-Power EMI Reduction IC

 

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Alliance Semiconductor Corporation

October 2003
P2811/12/14

rev
Alliance Semiconductor
2575, Augustine Drive
Santa Clara, CA Tel: 408.855.4900 Fax: 408.855.4999 www.alsc.com
Notice: The information in this document is subject to change without notice.
Low-Power EMI Reduction IC

Features
FCC approved method of EMI attenuation
Provides up to 15 dB EMI reduction
Generates 1X, 2X, and 4X low EMI spread spectrum
clock of the input frequency
1X: P2811, 2X: P2812, 4X: P2814
Optimized for input frequency range from 10 to 40
MHz P2811: 10 to 40 MHz P2812: 10 to 40 MHz
P2814: 10 to 40 MHz
Internal loop filter minimizes external components
and board space
Selectable spread options: Down Spread and Center
Spread
Low inherent cycle-to-cycle jitter
Eight spread % selections: 0.625% to 3.5%
3.3 V operating voltage
CMOS/TTL compatible inputs and outputs
Pinout compatible with Cypress CY25811,
CY25812, and CY25814
Products available for industrial temperature range
Available in 8-pin SOIC and TSSOP
Product Description
The P28xx is a versatile spread spectrum frequency
modulator designed specifically for input clock frequencies
from 10 to 40 MHz (see Input/Output Frequency Range
Selections). The P28xx can generate an EMI reduced clock
from crystal, ceramic resonator, or system clock. The
P28xx-A and P28xx-B offer various combinations of spread
options and percentage deviations (see Output Frequency
Deviation and Spread Option Selections section). These
combinations include Down Spread, Center Spread and
percentage deviation range from 0.625% to -3.50%.
The P28xx reduces electromagnetic interference (EMI) at
the clock source, allowing a system wide EMI reduction for
all the down stream clocks and data dependent signals.
The P28xx allows significant system cost savings by
reducing the number of circuit board layers, ferrite beads,
shielding, and other passive components that are
traditionally required to pass EMI regulations.
The P28xx modulates the output of a single PLL in order to
"spread" the bandwidth of a synthesized clock, thereby
decreasing the peak amplitudes of its harmonics. This
results in significantly lower system EMI compared to the
typical narrow band signal produced by oscillators and
most clock generators. Lowering EMI by increasing a
signal's bandwidth is called "spread spectrum clock
generation".
The P28xx uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented by using a proprietary all-digital method.

Applications
The P28xx is targeted towards EMI management for
memory interfaces in mobile graphic chipsets and high-
speed digital applications such as PC peripheral devices,
consumer electronics, and embedded controller systems.

Block Diagram
October 2003
P2811/12/14

rev
Low Power EMI Reduction IC
2 of 8
Notice: The information in this document is subject to change without notice.

Pin Configuration

Pin Description

Pin#
Pin Name
Type
Description
1
XIN
I
Connect to externally generated clock signal or crystal.
2
VSS
P
Ground Connection. Connect to system ground.
3
D_C
I
Digital logic input used to select Down (LOW) or Center (HIGH) Spread
Options (see Output Frequency Deviation and Spread Option Selections).
This pin has an internal pull-up resistor.
4
SRS
I
Spread Range Selection. Digital logic input used to select frequency
deviation (see Output Frequency Deviation and Spread Option Selections).
This pin has an internal pull-up resistor.
5
ModOut
O
Spread Spectrum clock output (see Input/Output Frequency Range
Selections and Output Frequency Deviation and Spread Option Selections).
6
FRS
I
Frequency Range Selection. Digital logic input used to select input fre-
quency range (see Input/Output Frequency Range Selections). This pin has
an internal pull-up resistor.
7
VDD
P
Connect to +3.3 V
8
XOUT
I
Connect to crystal. No connect if externally generated clock signal is used.


Input/Output Frequency Range Selections
Part number
Pin 6
P2811 (1X)
P2812 (2X)
P2814 (4X)
FRS
Input
(MHz)
Output
(MHz)
Input
(MHz)
Output
(MHz)
Input
(MHz)
Output
(MHz)
Modulation
rate
0
10-20 10-20 10-20 20-40 10-20 40-80
Input frequency
/ 448
1
20-40 20-40 20-40 40-80 20-40 80-160
Input frequency
/ 896
October 2003
P2811/12/14

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Low Power EMI Reduction IC
3 of 8
Notice: The information in this document is subject to change without notice.
Output Frequency Deviation and Spread Option Selections
Part number
Pin 3 D_C
Pin 4 SRS
Output frequency deviation and
spread option
0 0
-2.50%
(Down)
0 1
-3.50%
(Down)
1 0
+/-1.25%
(Center)
P2811/12/14A
1 1
+/-1.75%
(Center)
0 0
-1.25%
(Down)
0 1
-1.75%
(Down)
1 0 +/-0.625%
(Center)
P2811/12/14B
1 1 +/-0.875%
(Center)
Absolute Maximum Ratings
Symbol
Parameter
Rating
Unit
V
DD
, V
IN
Voltage on any pin with respect to GND
-0.5 to + 7.0
V
T
STG
Storage
temperature
-65 to +125
C
T
A
Operating
temperature
0 to 70
C

DC Electrical Characteristics
3.3 V, 25 C
Symbol
Parameter
Min
Typ
Max
Unit
V
IL
Input Low Voltage
GND 0.3
0.8
V
V
IH
Input High Voltage
V
DD
+ 0.3
V
I
IL
Input low Current (inputs
D_C, SRS, and FRS)
-60.00 -20.00 A
I
IH
Input
High
Current
1.00
A
I
XOL
XOUT Output Low Current
(@ 0.4V, VDD = 3.3V)
2.00 12.00
mA
I
XOH
XOUT Output High Current
(@ 2.5V, VDD = 3.3V)
12.00
mA
V
OL
Output Low Voltage
(VDD=3.3V, IOL = 20 mA)
0.4 V
V
OH
Output High Voltage
(VDD=3.3V, IOH = 20 mA)
2.8 V
I
DD
Static Supply Current
Standby Mode
4.5 mA
I
CC
Dynamic Supply Current
Normal Mode (3.3V and 25
pF probe loading)
7.1 fIN-min
13.9 f
IN-max
mA
V
DD
Operating
Voltage
3.3
V
t
ON
Power Up Time (First locked
clock cycle after power up)
0.18 mS
Z
OUT
Clock Output Impedance
50
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P2811/12/14

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Low Power EMI Reduction IC
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Notice: The information in this document is subject to change without notice.

AC Electrical Characteristics
3.3 V, 25 C
Symbol
Parameter
Min
Typ
Max
Unit
f
IN
Input frequency P2811/12/14
10
40
MHz
f
OUT
Output frequency P2811
10
40
MHz
Output frequency P2812
20
80
MHz
Output frequency P2814
40
160
MHz
t
LH
1
Output rise time (measured at
0.8V to 2.0V)
0.69
ns
t
HL
1
Output fall time (measured at
2.0V to 0.8V)
0.66
ns
t
JC
Jitter (cycle to cycle)
-200
200
ps
t
D
Output duty cycle
45
50
55
%
1. tLH and tHL are measured into a capacitive load of 15 pF
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P2811/12/14

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Low Power EMI Reduction IC
5 of 8
Notice: The information in this document is subject to change without notice.

Package Information
Mechanical Package Outline 8-Pin SOIC



Dimensions in inches
Dimensions in millimeters
Symbol
Min
Nor
Max
Min
Nor
Max
A 0.057
0.064
0.071
1.45
1.63
1.80
A1 0.004 0.007
0.010
0.10
0.18
0.25
A2 0.053 0.061
0.069
1.35
1.55
1.75
B 0.012
0.016
0.020
0.31
0.41
0.51
C 0.004 0.006 0.01 0.10 0.15 0.25
D 0.186
0.194
0.202
4.72
4.92
5.12
E 0.148
0.156
0.164
3.75
3.95
4.15
e
0.050 BSC
1.27 BSC
H 0.224
0.236
0.248
5.70
6.00
6.30
L 0.012
0.020
0.028
0.30
0.50
0.70
a 0 5 8 0 5 8
Note: Controlling dimensions are millimeters
SOIC 0.074 grams unit weight
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